1. Field of the Invention
This invention relates to a pulse-density-modulated controller, and particularly relates to a pulse-density-modulated controller suitable for various dynamic sequence.
2. Description of the Prior Art
In the traditional technique of switching mode power supply, the DC signal is approached by high frequency signals. The high frequency signals are rectified by a low pass filter, so the high frequency component of the signal is removed and the low frequency component of the signal is left. The frequency of the switching mode power supply is determined by the output voltage level. The traditional switching mode power supply utilizes PWM (Pulse Width Modulation) to generate a switching digital signal, then the switching digital signal is fed into the switch to enable the current switching mode power supply able to convert the current to the required power output. Whereas, the switching timing and the sequence of the PWM do not fit the proper switching time of the switch, the cross point of the current generated by the RLC resonant circuit is not the exact cross point of the current. Thus, the extra cross over distortion is presented. To overcome the switching losses, the improvement of the zero-cross-over is developed in the past few years. To minimize the current loss due to the cross over distortion during the switching of the switching power supply, the switching sequence must be generated by PDM modulator (Pulse Density Modulation). In determining the switching time and switching sequence, an A/D (analog-to-digital) converter and the switching sequence stored in the ROM (Read Only Memory) are utilized in the prior PDM modulator to enable the switching mode power supply to switch at zero voltage or zero current. Being processed by the PDM modulation, the control signal is fed to the switch, so the output current of the switching power supply can reach the required output power.
The PDM inverter repeats the alternating run and stop to adjust the average output power. "Pulse-Density-Modulated Power Control of a 4 kW, 450 kHz Voltage-Source Inverter for Induction Melting Applications" by Hideaki Fujita, et al. IEEE TRANSACTION ON INDUSTORY APPLICATIONS. VOL. 32. NO. 2. MARCH/APRIL 1996, discloses three switching modes in the PDM. The simplified circuit of the switching mode in the PDM is shown in FIG. 1A, the three switching modes are shown in FIG. 1B, FIG. 1C and FIG. 1D. Conventional frequency controlled inverters have only two switching modes such as modes I and II shown in FIG. 1B and FIG. 1C respectively. In addition, the PDM inverter proposes a mode III that the resonant current continuously flowing through a low side MOSFET in one leg and a low side diode in the other leg, which is shown in FIG. 1D, and the output voltage of the PDM inverter is equal to zero. Thus, the mode III is utilized in the PDM inverter and the Phase-Shift inverter.
FIG. 2 shows a switching pattern of the PDM. The inverter acts as a square wave voltage source with the amplitude of Vd for three resonant cycles, while it acts as a zero voltage source for only one cycle. If the attention is paid to four resonant cycles, the output voltage of the inverter is in a periodic waveform, where the average output voltage is 3/4, compared with the full power operation. Thus, the output power of the inverter can be controlled by adjusting the pulse density of the square wave voltage. The PDM can reduce the switching losses greatly because all the MOSFETs are always turned on and off at zero current. To analyze the output power of the resonant circuit, it is proportional to the density of the pulses generated by the PDM modulator.
FIG. 3 shows a control circuit of the pulse-density-modulated modulator. The control circuit forms a type of phase-locked loop, which outputs the gate pulses in phase with the resonant current. The amplitude of the resonant current is too small to detect the phase at the time of the zero crossing of the source voltage with the line frequency of 60 Hz because there is no smoothing capacitor connected to the dc link. Thus, the cut-off frequency of the low pass filter is set to be 1.5 ms (0.0015 seconds) to eliminate the change of the frequency of the voltage-controlled oscillator at the zero-crossing. The output of the voltage-controlled oscillator is a pulse train, and the frequency of which is twice as high as the operating frequency of the inverter. The pulse train is applied to the five-bit set-up counter and then a desired PDM pattern is selected out of the 16 patterns, which are stored in a ROM.
FIG. 4 shows the 16 PDM patterns used in the experimental system as a parameter of the pulse density of TA/T from 1/16 to 16/16. The period of time of each PDM pattern stored in the ROM is equal to sixteen times of the resonant period. The PDM patterns are determined so as to reduce the amplitude's fluctuation of the resonant current, which is caused by the PDM. As a result, an actual period of time depends on the PDM pattern, which is chosen by a pattern select signal. The PDM pattern signals A and B are applied to four blanking time circuits to produce four gate drive signals. Thus, the operating frequency of the pulse-density-modulated controller is equal to the actual switching frequency. On the other hand, the operating frequency of the pulse-density-modulated controller is equal to the resonant frequency in the PDM modulator. This means that the PDM modulator gets zero-current switching (ZCS) in all operating conditions.
The PDM modulator would make a great contribution to reduce the switching losses, and to achieve high reliability. The PDM modulator is capable of adjusting the output power by itself, and performing both ZVS and ZCS in all the operating conditions, so the volume is thus shrunk. Whereas, the dynamic response is limited due to the fixed timing sequence stored in the ROM (Read Only Memory). Furthermore, the high speed A/D (Analog to Digital) converter always limits the dynamic response.